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d a t a sh eet preliminary speci?cation file under integrated circuits, ic02 june 1993 integrated circuits TDA4655 generic multi-standard decoder
june 1993 2 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 features low voltage (8 v) low power dissipation (250 mw) automatic standard recognition no adjustments required reduced external components not all time constants integrated (acc, secam de-emphasis). general description the TDA4655 is a monolithic integrated multi-standard colour decoder for pal, secam and ntsc (3.58 and 4.43 mhz) with negative colour difference output signals. it is adapted to the integrated baseband delay line tda4660/61. quick reference data notes to quick reference data 1. within 2 db output voltage deviation. 2. burstkey width for pal 4.3 m s, for ntsc 3.6 m s. burst width for pal and ntsc 2.25 m s ratio burst chrominance amplitude 1/2.2. ordering information note 1. sot234-1; 1996 november 26. 2. sot137-1; 1996 november 26. symbol parameter conditions min. typ. max. unit supply v p supply voltage 7.2 8.0 8.8 v i p supply current v p = 8.0 v; without load 25 31 37 ma p tot total power dissipation v p = 8.0 v; without load - 248 296 mw inputs v 11 chrominance input voltage (peak-to-peak value) note 1 20 200 400 mv v 24 sandcastle input voltage -- 13.2 v outputs v1 colour difference output signals (peak-to-peak value) independent of supply voltage; note 2 - (r - y) output pal and ntsc 4.43 mhz 442 525 624 mv ntsc 3.58 mhz 370 440 523 mv secam 950 1050 1150 mv v 3 - (b-y) output pal and ntsc 4.43 mhz 559 665 791 mv ntsc 3.58 mhz 468 557 662 mv secam 1200 1330 1460 mv extended type number package pins pin position material code TDA4655 24 sdil plastic sot234 (1) TDA4655t 24 so plastic sot137a (2)
june 1993 3 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 fig.1 block diagram.
june 1993 4 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 pinning symbol pin description - (r - y)o 1 colour difference signal output - (r - y)* for baseband delay line deem 2 external capacitor for secam de-emphasis - (b - y)o 3 colour difference signal output - (b - y)* for baseband delay line cfob 4 external capacitor secam demodulator control (b - y) channel gnd 1 5 ground gnd 2 6 ground i ref 7 external resistor for secam oscillator v p1 8 supply 8 v v p2 9 supply 8 v cfor 10 external capacitor secam demodulator control (r - y) channel chr i 11 chrominance signal input c acc 12 external capacitor for acc control hue 13 input for hue control and service switch n idt 14 external capacitor for identi?cation circuit (ntsc) p idt 15 external capacitor for identi?cation circuit (pal and secam) osc 1 16 pal crystal pll 17 external loop ?lter osc 2 18 ntsc crystal 2fsc 19 2 f sc output n o1 20 standard setting input/output for ntsc 4.43 n o2 21 standard setting input/output for ntsc 3.58 sec o 22 standard setting input/output for secam pal o 23 standard setting input/output for pal sc 24 sandcastle input fig.2 pin configuration.
june 1993 5 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 functional description the ic contains all functions required for the identification and demodulation of signals with the standards pal, secam, ntsc 3.5 with 3.58 mhz colour-carrier frequency and ntsc 4.3 with 4.43 mhz colour-carrier frequency. when an unknown signal is fed into the input, the circuit has to detect the standard of the signal, and has to switch on successively the appropriate input filter, crystal (8.8 or 7.2 mhz) and demodulator and finally, after having identified the signal, it has to switch on the colour and, in event of ntsc reception, the hue control. at the outputs the two colour difference signals - (r - y)* and -(b - y)* are available. the identification circuit is able to discriminate between ntsc signals with colour-carrier frequencies of 3.58 mhz or 4.43 mhz. acc-stage the chrominance signal is fed into the asymmetrical input (pin 11) of the acc-stage (automatic colour control). the input has to be ac coupled and has an input impedance of 20 k w in parallel with 10 pf. to control the chrominance amplitude the modulation independent burst amplitude is measured during the burstkey pulse which is derived from the sandcastle pulse present at pin 24. the generated error current is fed into an external storage capacitor at pin 12. the integrated error voltage controls the gain of the acc stage so that its output is independent of input signal variations. the measurement is disabled during the vertical blanking to avoid failures because of missing burst signals. reference signal generation the reference signal generation is achieved by a pll system. the reference oscillator operates at twice the colour-carrier frequency and is locked on the burst of the chrominance signal (chr). a divider provides reference signals (f sc ) with the correct phase relationship for the pal/ntsc demodulator and the identification part. in the secam mode the two f 0 frequencies are derived from the pal crystal frequency by special dividers. in this mode the oscillator is not locked to the input signal. in the ntsc mode the hue control circuit is switched between acc stage and pll. the phase shift of the signal can be controlled by a dc voltage at pin 13. the hue control circuit is switched off during scanning. the reference frequency (2 f sc ) is available at pin 19 to drive a pal comb filter for example. demodulation the demodulation of the colour signal requires two demodulators. one is common for pal and ntsc signals, the other is for secam signals. the pal/ntsc demodulator consists of two synchronized demodulators, one for the (b - y) channel and the other for the (r - y) channel. the required reference signals (f sc ) are input from the reference oscillator. in ntsc mode the pal switch is disabled. the secam demodulator consists of a pll system. during vertical blanking the pll oscillator is tuned to the f 0 frequencies to provide a fixed black level at the demodulator output. during demodulation the control voltages are stored in the external capacitors at pins 4 and 10. the oscillator requires an external resistor at pin 7. behind the pll demodulator the signal is fed into the de-emphasis network which consists of two internal resistors (2.8 k w and 5.6 k w ) and an external capacitor connected at pin 2 (220 pf). after demodulation the signal is filtered and then fed into the next stage. blanking, colour-killer, buffers as a result of using only one demodulator in secam mode the demodulated signal has to be split up in the (b - y) channel and the (r - y) channel. the unwanted signals occuring every second line, (r - y) in the (b - y) channel and (b - y) and in the (r - y) channel, have to be blanked. this happens in the blanking stage by an artificial black level being inserted alternately every second line. to avoid disturbances during line and field flyback these parts of the colour differential signals are blanked in all modes. when no signal has been identified, the colour is switched off (signals are blanked) by the colour killer. at the end of the colour channels are low-ohmic buffers (emitter followers). the cd output signals - (b - y)* and - (r - y)* are available at pins 1 and 3. identi?cation and system control the identification part contains three identification demodulators. the first demodulates in pal mode. it is only active during the burstkey pulse. the reference signal (f sc ) has the (r - y) phase. the second demodulator (pll system) operates in secam mode and is active also during the burstkey pulse, but delayed by 2 m s. the pll demodulator discriminates the frequency difference between the unmodulated f 0 frequencies of the incoming signal (chr) and the reference frequency input from the crystal oscillator. these two demodulators are followed by an h/2 switch rectifying the
june 1993 6 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 demodulated signal. the result is an identification signal (p idt, pin 15) that is positive for a pal signal in pal mode, for a secam signal in secam mode and for a pal signal in ntsc 4.4 mode. if p idt is positive in secam mode, the scanner switches back to the pal mode in order to prevent a pal signal being erroneously identified as a secam signal (pal priority). if then p idt is not positive, the scanner returns to secam mode and remains there until p idt is positive again. in the event of a field frequency of 60 hz the signal can not be identified as a secam signal, even if p idt is positive. in this event the scanner switches forward in the ntsc 3.5 mode. if the h/2 signal has the wrong polarity, the identification signal is negative and the h/2 flip-flop is set to the correct phase. the third demodulator operates in ntsc mode and is active during the burstkey pulse. the resulting identification signal (n idt , pin 14) is positive for pal and ntsc 4.4 signals in ntsc 4.4 mode and for ntsc 3.5 signals in the ntsc 3.5 mode. the reference signal has the (b - y) phase. the two identification signals allow an unequivocal identification of the received signal. in the event of a signal being identified, the scanning is stopped and after a delay time the colour is switched on. the standard outputs (active high) are available at the pins 20, 21, 22 and 23. during scanning the high level is 2.5 v and when a signal has been identified the high level is switched to 6 v. the standard pins can also be used as inputs in order to force the ic into a desired mode (forced standard setting). sandcastle detector and pulse processing in the sandcastle detector the super sandcastle pulse (sc) present at pin 24 is compared with three internal threshold levels by means of three differential amplifiers. the derived signals are the burstkey pulse, the horizontal blanking pulse and the combined horizontal and vertical blanking pulse. these signals are processed into various control pulses required for the timing of the ic. bandgap reference in order to ensure that the cd output signals and the threshold levels of the sandcastle detector are independent of supply voltage variations a bandgap reference voltage has been integrated. limiting values in accordance with the absolute maximum rating system (iec 134). thermal resistance symbol parameter conditions min. max. unit t stg storage temperature - 25 + 150 c t amb operating ambient temperature 0 + 70 c v p supply voltage - 8.8 v p tot power dissipation without load - 330 mw v 24 voltage at pin 24 i max =10 m a - 15 v voltage at all other pins i max = 100 m a - v p + v be v symbol parameter thermal resistance r th j-a thermal resistance on printed-circuit board from junction to ambient in free air (without heat spreader) so 24 90 k/w sdil 24 70 k/w
june 1993 7 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 characteristics measured with application circuit (fig.4) at t amb = + 25 c, 8 v supply, 75% colour bar chrominance input signal of 200 mv (peak-to-peak value) and nominal phase for ntsc unless otherwise specified. all voltages measured referenced to ground. symbol parameter conditions min. typ. max. unit v p supply voltage 7.2 8.0 8.8 v i supply current v p = 8.0 v without load 25 31 37 ma p tot total power dissipation v p = 8.0 v without load - 248 296 mw cd signal outputs (pins 1 and 3) pal or ntsc v 1 colour difference output signals independent of supply voltage; note 1 - (r-y) output pal and ntsc 4.43 mhz (peak-to-peak value) 442 525 624 mv ntsc 3.58 mhz (peak-to-peak value) 370 440 523 mv v 3 - (b-y) output pal and ntsc 4.43 mhz (peak-to-peak value) 559 665 791 mv ntsc 3.58 mhz (peak-to-peak value) 468 557 662 mv v pal /v ntsc signal ratio pal/ntsc 3.58 mhz note 2 0.5 1.5 2.5 db v 1 /v 3 ratio of cd signal amplitudes v(r-y) / v(b-y) note 2 0.75 0.79 0.83 - m signal linearity - (r-y) output v 1 = 0.8 v (p-p) 0.8 --- signal linearity - (b-y) output v 3 = 1.0 v (p-p) 0.8 --- f g cut-off frequency (both outputs) - 3 db - 1 - mhz t d chrominance delay time 220 270 320 ns s/n signal to noise ratio for nominal output voltages note 3 40 -- db v 1, v 3 residual carrier at cd outputs: 1 subcarrier frequency (peak-to-peak value) -- 10 mv 2 subcarrier frequency (peak-to-peak value) note 4 -- 30 mv h/2 content at r-y output at nominal input signal (peak-to-peak value) -- 10 mv a crosstalk between cd channels - 40 -- db r 1, r 3 output resistance (npn emitter follower) -- 200 w i 1, i 3 output current --- 3ma secam v 1 colour difference output signals independent of supply voltage; note 5 - (r-y) output (peak-to-peak value) 0.95 1.05 1.15 v v 3 - (b-y) output (peak-to-peak value) 1.20 1.33 1.46 v v 1 /v 3 ratio of cd signal amplitudes v(r-y)/(b-y) 0.75 0.79 0.83 - m signal linearity at nominal output voltage 0.8 ---
june 1993 8 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 f g cut-off frequency - 3 db - 730 - khz t d chrominance delay time 400 500 600 ns s/n signal to noise ratio for 100 mv (p-p) input signal and nominal output voltages note 3 40 -- db v 1, v 3 residual carrier at cd outputs: 1 subcarrier frequency (peak-to-peak value) -- 10 mv 2 subcarrier frequency (peak-to-peak value) -- 20 mv d v 3 shift of demodulated f 0 level relative to blanking level - (b-y) output note 9 - 0 13 mv d v 1 - (r-y) output - 0 10 mv impedance and currents see pal or ntsc speci?cation capacitor for secam de-emphasis (pin 2) c 2 value of external capacitor - 220 - pf r a value of internal de-emphasis resistors t amb = + 35 c 2.4 2.8 3.2 k w r b 4.8 5.6 6.4 k w d (r a /r b ) relative tolerance of de-emphasis resistors -- 5% capacitors for secam demodulator control (pins 4 and 10; note 6) d v 1, 3 shift of demodulated f 0 level due to external leakage current c ext = 220 nf -- 0.3 mv/na resistor for secam oscillator (pin 7) v 7 dc voltage 2.4 2.81 3.2 v r 7 value of external resistor ( 1%) - 5.62 - k w c 7 value of external capacitor ( 20%) - 10 - nf chrominance input (pin 11) v 11 input signal (peak-to-peak value) note 7 20 200 400 mv r 11 input resistance 16 20 24 k w c 11 input capacitance -- 10 pf capacitor for acc (pin 12; note 8) d v 1, 3 change of cd output signals during ?eld blanking due to external leakage current c ext = 100 nf - 0.2 - %/na hue control (ntsc) and service switch (pin 13) f phase shift of reference carrier relative to phase at open-circuit pin 13 v 13 =3v - 30 -- v 13 = open circuit - 50 + 5 v 13 =5v + 30 -- v 13 internal bias voltage (proportional to supply voltage) pin 13 open circuit 3.8 4.0 4.2 v r 13 input resistance 25 30 35 k w symbol parameter conditions min. typ. max. unit
june 1993 9 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 capacitor for identi?cation (pins 14 and 15) v 14, v 15 dc voltage for an identi?ed signal 2.8 3.2 3.5 v dc voltage for an unidenti?ed signal 1.5 2.0 2.3 v pll oscillator measured with nominal crystal (pins 16 and 18; see table 1) r 16, r 17 initial oscillator ampli?er input resistance - 500 --w c 16, c 17 oscillator ampli?er input capacitance -- 10 pf d f l lock-in-range referenced to note 10 4.43361875 mhz 400 - 1300 hz 3.579545 mhz 330 - 1300 hz f phase difference for 400 hz respectively 330 hz deviation of colour carrier frequency -- 1 degree 2 f sc output (pin 19; if the output is not used, the pin should be connected to supply) v 19 dc output level i 19 = 0 a 6.1 6.3 6.5 v r 19 output resistance i 19 =0a -- 350 w i 19 output current --- 1.0 ma v 19 output signal (peak-to-peak value) - 250 - mv standard setting inputs/outputs (pins 20 to 23; note 11) used as output: npn emitter follower output with 0.1 ma source to ground v o on-state, during scanning, colour off 2.4 2.5 2.7 v on-state, colour on 5.8 6.0 6.2 v r o output resistance i o =0 -- 300 w i o output current --- 3ma used as input: forced system switching v o threshold for system on 6.8 7.0 7.2 v i o input current 100 150 180 m a sandcastle pulse detector (pin 24; note 12) c 24 input capacitance -- 10 pf v 24 thresholds for ?eld and line pulse separation pulse on 1.3 1.6 1.9 v pulse off 1.1 1.4 1.7 v line pulse separation pulse on 3.3 3.6 3.9 v pulse off 3.1 3.4 3.7 v burst pulse separation pulse on 5.3 5.6 5.9 v pulse off 5.1 5.4 5.7 v symbol parameter conditions min. typ. max. unit
june 1993 10 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 notes to the characteristics 1. burstkey width for pal 4.3 m s, for ntsc 3.6 m s. burst width for pal and ntsc 2.25 m s, ratio burst chrominance amplitude 1/2.2. 2. at nominal phase of hue control. 3. v (p-p) of signal divided by 6 times effective noise voltage. 4. at ntsc 3.58 35 mv (p-p). 5. h/2 blanking alternately every second line. 6. these pins are leakage current sensitive. pin 4 for (b-y) channel, pin 10 for (r-y) channel. 7. within 2 db output voltage deviation. 8. this pin is leakage current sensitive. 9. ic only. 10. depends also on network on pin 17. 11. pin 23 for pal, pin 22 for secam, pin 21 for ntsc 3.58 mhz, pin 20 for ntsc 4.43 mhz. threshold levels are dependent on supply. 12. the field interval of the sandcastle has to be adapted to the ics tda2579b and tda4690. the thresholds are independent of supply voltage. 13. system scanning sequence: pal, secam, ntsc 3.5, ntsc 4.4. system control processing (note 13) t d system hold delay in event of a signal disappearing for a short time 2 - 3 ?eld periods colour killer; colour on delay switching occurs during ?eld blanking 2 - 3 ?eld periods colour off delay 0 - 1 ?eld periods t s scanning time for each system - 4 - ?eld periods quality specification urv-4-2-59/601 symbol parameter conditions min. typ. max. unit
june 1993 11 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 table 1 speci?cation of quartz crystals in hc-49/u13 holder; standard application. symbol parameter value unit 9922 520 00385 9922 520 00387 f n nominal frequency 8.867570 7.159090 mhz c l load capacitance series resonance d f n adjustment tolerance of f n at + 25 c 20 ppm r r resonance resistance over temperature range 60 w r dld max in the drive level range between 10 - 12 w and 1.0 10 - 3 w, the resonance resistance may not exceed (at + 25 c) the value of r dld max tbn tbn w r n resonance resistance of unwanted response 2r r (+25 c) w c 1 motional capacitance ( 20%) 14.0 19.5 ff c 0 parallel capacitance ( 20%) 3.6 4.4 pf t amb operating ambient temperature - 10 to + 60 c d f n frequency tolerance over temperature 20 ppm
june 1993 12 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 fig.3 internal circuits.
june 1993 13 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 fig.4 application circuit.
june 1993 14 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 package outlines unit b 1 cee m h l references outline version european projection issue date iec jedec eiaj mm dimensions (mm are the original dimensions) sot234-1 92-11-17 95-02-04 b max. w m e e 1 1.3 0.8 0.53 0.40 0.32 0.23 22.3 21.4 9.1 8.7 3.2 2.8 0.18 1.778 10.16 10.7 10.2 12.2 10.5 1.6 4.7 0.51 3.8 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 24 1 13 12 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. (1) (1) d (1) z a max. 12 a min. a max. sdip24: plastic shrink dual in-line package; 24 leads (400 mil) sot234-1
june 1993 15 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot137-1 x 12 24 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a 13 (a ) 3 a y 0.25 075e05 ms-013ad pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.61 0.60 0.30 0.29 0.050 1.4 0.055 0.42 0.39 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 92-11-17 95-01-24 e 1 0 5 10 mm scale so24: plastic small outline package; 24 leads; body width 7.5 mm sot137-1
june 1993 16 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). sdip s oldering by dipping or by wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joint for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg max ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. r epairing soldered joints apply a low voltage soldering iron (less than 24 v) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. so r eflow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. w ave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. r epairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
june 1993 17 philips semiconductors preliminary speci?cation generic multi-standard decoder TDA4655 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.

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